A CMOS nested chopper instrumentation amplifier with 100 nV offset

Offset and 1/f noise have been major enemies for analog IC designers since the enormous increase of the market for digital applications forced them to develop analog front ends in standard CMOS technology. Because static techniques like trimming cannot reduce 1/f noise, solutions had to be found in dynamic offset cancellation. The current work presents an improvement of the chopper amplifier concept, called the nested chopper amplifier. It is shown that with this architecture the residual offset is reduced to <100 nV, while retaining minimal thermal noise in the signal band.