DocumentCode
1966783
Title
Design and simulation of RFID special IP core based on FPGA technolgy
Author
Wei, Lifeng ; Ma, Lianbo
Author_Institution
Sch. of Economic & Manage., Shenyang Aerosp. Univ., Shenyang, China
Volume
2
fYear
2010
fDate
10-11 July 2010
Firstpage
297
Lastpage
300
Abstract
This paper designs an RFID IP core by utilizing FPGA technology, which has advantages of internal task scheduling and high-speed encoding & decoding. The RTL design of base-band communication IP core based on modular method is presented. The RFID simulation model is established and the experiment results show that the proposed communication simulation model has a good performance, and the IP-core has reached the anticipated effects.
Keywords
decoding; encoding; field programmable gate arrays; radiofrequency identification; scheduling; FPGA technology; RFID IP core; RTL design; RTL simulation model; base-band communication IP core; high-speed decoding; high-speed encoding; internal task scheduling; modular method; AWGN; Accuracy; Artificial neural networks; Field programmable gate arrays; IP networks; Radiofrequency identification; FPGA; IP; RFID; base-band; simulation;
fLanguage
English
Publisher
ieee
Conference_Titel
Industrial and Information Systems (IIS), 2010 2nd International Conference on
Conference_Location
Dalian
Print_ISBN
978-1-4244-7860-6
Type
conf
DOI
10.1109/INDUSIS.2010.5565709
Filename
5565709
Link To Document