DocumentCode
1967668
Title
Parallel test description and analysis of parallel test system speedup through Amdahl's law
Author
Waivio, Nathan
Author_Institution
Northrop Grumman Corp., Rolling Meadows
fYear
2007
fDate
17-20 Sept. 2007
Firstpage
735
Lastpage
740
Abstract
This paper will outline various types of parallel test, discuss an adaptation of Amdahl´s law to parallel test, and discuss possible extensions to ATML for parallel test. Amdahl´s law is an equation in computer science that is used to derive the speedup gained through parallelizing the software; it expresses the speedup as a function of number of processors. Parallel test increases the throughput and efficiency of test systems. Amdahl´s law can be adapted to analyze the speedup of a test system that makes use of parallelism. Parallel test is most commonly thought of as multiple units under test (UUT) to be tested concurrently. Other types of parallel test include a single UUT that could have multiple tests run on it concurrently; and the third type of parallelism that can be exploited is a system that could concurrently execute its actions. The test community has been moving to create more portable test information with ATML. One component of the ATML family of standards is the ATML TestDescription (IEEE P1671.1). It is possible to extend the Test Description to explicitly define parallelism in test. The directed graph is a technique that can be used to express all of the test information for a TPS. Extending the ATML test description can be accomplished by utilizing aspects of other XML based standards for directed graphs like GraphML, that have better capabilities for conveying the information.
Keywords
automatic test software; directed graphs; parallel programming; ATML family; ATML testdescription; Amdahl´s law; GraphML; Test Description; XML based standards; computer science; directed graph; parallel test description; parallel test system; units under test; Automatic testing; Computer science; Costs; Electronic equipment testing; Instruments; Parallel processing; Parallel programming; Switching systems; System testing; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Autotestcon, 2007 IEEE
Conference_Location
Baltimore, MD
ISSN
1088-7725
Print_ISBN
978-1-4244-1239-6
Electronic_ISBN
1088-7725
Type
conf
DOI
10.1109/AUTEST.2007.4374292
Filename
4374292
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