Title :
Design challenges of PLL, I/O, and mixed signal circuits in advanced CMOS/SOI technologies
Author :
Sanchez, Hector Eloys
Author_Institution :
Adv. Circuit Design Center, Freescale Semicond., Austin, TX, USA
Abstract :
This article presents the technology landscape and the directions of the industry in the design of phase locked loops, input-output and mixed signal circuits in CMOS/SOI technology. It discusses the issues considered in the design of the circuits such as market pressures, productivity and the technology characteristics.
Keywords :
CMOS integrated circuits; integrated circuit design; logic devices; mixed analogue-digital integrated circuits; phase locked loops; silicon-on-insulator; I/O circuits; PLL circuits; advanced CMOS/SOI technologies; input-output; integrated circuit design; market pressures; mixed signal circuits; phase locked loops; productivity; silicon-on-insulator; technology characteristics; CMOS integrated circuits; Integrated circuit design; Logic devices; Mixed analog-digital integrated circuits; Phase locked loops; Silicon on insulator technology;
Conference_Titel :
Implementation of High Performance Circuits, 2004. (DCAS-04). Proceedings of the 2004 IEEE Dallas/CAS Workshop
Print_ISBN :
0-7803-8713-9
DOI :
10.1109/DCAS.2004.1360442
