DocumentCode :
1969692
Title :
Analysis of high-level address code transformations for programmable processors
Author :
Gupta, Sumit ; Miranda, Miguel ; Catthoor, Francky ; Gupta, Rajesh
Author_Institution :
Dept. of Inf. & Comput. Sci., California Univ., Irvine, CA, USA
fYear :
2000
fDate :
2000
Firstpage :
9
Lastpage :
13
Abstract :
Memory intensive applications require considerable arithmetic for the computation and selection of the different memory access pointers. These memory address calculations often involve complex (non) linear arithmetic expressions which have to be calculated during program execution under tight timing constraints, this becoming a critical bottleneck in the overall system performance. This paper explores applicability and effectiveness of source-level optimisations (as opposed to instruction-level) for address computations in the context of multimedia. We propose and evaluate two processor-target independent source-level optimisation techniques, namely, global scope operation cost minimisation complemented with loop-invariant code hoisting, and nonlinear operator strength reduction. The transformations attempt to achieve minimal code execution within loops and reduced operator strengths. The effectiveness of the transformations is demonstrated with two real-life multimedia application kernels by comparing the improvements in the number of execution cycles, before and after applying the systematic source-level optimisations. Using state-of-the-art C compilers on several popular RISC platforms
Keywords :
C language; digital signal processing chips; multimedia computing; program compilers; reduced instruction set computing; RISC platforms; global scope operation cost minimisation; high-level address code transformations; loop-invariant code hoisting; memory access pointers; memory intensive applications; nonlinear operator strength reduction; processor-target independent source-level optimisation; program execution; programmable processors; real-life multimedia application kernels; source-level optimisations; state-of-the-art C compilers; timing constraints; Application software; Arithmetic; Computer science; Costs; Electronic switching systems; Hardware; Information analysis; Optimizing compilers; Ores; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition 2000. Proceedings
Conference_Location :
Paris
Print_ISBN :
0-7695-0537-6
Type :
conf
DOI :
10.1109/DATE.2000.840008
Filename :
840008
Link To Document :
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