Title :
LDMOS Capacitance Analysis versus Gate and Drain Biases, Based on Comparison between TCAD Simulations and Measurements
Author :
Frre, S.F. ; Rhayem, J. ; Adawe, H.O. ; Gillon, R. ; Tack, M. ; Walton, A.J.
Author_Institution :
Alcatel Microelectronics, Oudenaarde, Belgium and The University of Edinburgh, UK
fDate :
11-13 September 2001
Keywords :
Analytical models; Capacitance measurement; Microelectronics; Performance evaluation; Power system dynamics; Power system modeling; Scattering parameters; Shape measurement; Switches; Voltage;
Conference_Titel :
Solid-State Device Research Conference, 2001. Proceeding of the 31st European
Print_ISBN :
2-914601-01-8
DOI :
10.1109/ESSDERC.2001.195240
