Title :
A new lower bound for fast block motion estimation algorithms
Author :
Duanmu, C.J. ; Ahmad, M.O. ; Swamy, M.N.S.
Author_Institution :
Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada
Abstract :
Current video coding standards of H.263, MPEG-2, and MPEG-4 employ the block motion estimation technique to decorrelate video sequences. Since the full-search algorithm for block motion estimation has a great deal of computational complexity, it is not suitable for real-time implementations. Some fast block motion estimation algorithms, such as the selective elimination algorithm, the multilevel successive elimination algorithm, and the vector-based algorithm, have been proposed in the literature. These algorithms reduce the computational complexity of the full search algorithm by utilizing a lower bound for the block-matching criterion of the mean absolute difference (MAD). However, the partial sums for the computation of the lower bound in these algorithms cannot take advantage of the byte-type data parallelism in the existing single instruction multiple data (SIMD) technique. In this paper, a new lower bound for the MAD is established, and this is achieved with the following three objectives in mind: (i) the partial sums can be used to calculate a lower bound to discard the computation of the MAD, (ii) the partial sums are of only 8 bits and saved in a contiguous memory space, and (in) eight partial sums can be processed concurrently in a single 64-bit SIMD register. The new lower bound can be employed in conjunction with an existing block motion estimation algorithm to accelerate the execution of the algorithm without any loss of accuracy. Simulation results demonstrate that the above scheme can accelerate the execution of the vector-based fast algorithm, selective elimination algorithm, and full search algorithm by about 10, 20, and 40 percents, respectively.
Keywords :
code standards; decorrelation; image sequences; motion estimation; parallel algorithms; real-time systems; video coding; 64-bit SIMD register; H.263 standard; MPEG-2; MPEG-4; block-matching criterion; byte-type data parallelism; computational complexity reduction; contiguous memory space; fast block motion estimation algorithm; full search algorithm; mean absolute difference; multilevel successive elimination algorithm; real-time implementation; selective elimination algorithm; single instruction multiple data technique; vector-based fast algorithm; video coding standard; video sequence decorrelation; Acceleration; Computational complexity; Computer aided instruction; Concurrent computing; Decorrelation; MPEG 4 Standard; Motion estimation; Parallel processing; Video coding; Video sequences;
Conference_Titel :
Electrical and Computer Engineering, 2003. IEEE CCECE 2003. Canadian Conference on
Print_ISBN :
0-7803-7781-8
DOI :
10.1109/CCECE.2003.1226302