Investigating the high-k/ingaas MOS system for future logic applications

As silicon devices reach the limit of dimensional scaling there is a growing interest in the use of high electron mobility channels, such as InxGa1-xAs, in conjunction high dielectric constant (high-k) gate oxides in future n-channel Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs). The understanding and control of electrically active defect states at the high-k/InxGa1-xAs interface and of charges within the atomic layer deposited (ALD) high-kfilms will be essential for the successful implementation of bighmobility channel materials. The objective of this presentation will be to provide an overview of the current understanding of the density and distribution of electrically active defects at the high-k/In0.53Ga0.47 As interface. The presentation will also consider defects located in the interfacial transition region between the high-k oxide and the InGaAs channel which are manifest as hysteresis in the capacitance-voltage response. Finally, the paper will present preliminary results which indicate the reliability of the high-k/InGaAs MO systemcan be improved by the use of forming gas annealing performed in-situ following the high-k deposition.