Title :
Reduced-complexity decoding of low-density parity check codes based on adaptive convergence
Author :
Su, Jia-Ning ; Lu, Zhenghao ; Yu, Xiaopeng ; Liu, Yang
Author_Institution :
Dept. of Microelectron., Soochow Univ., Suzhou, China
Abstract :
Low-density parity-check (LDPC) codes have recently been considered as a viable candidate for forward error correction in system level hardware-redundant, fault-tolerant logics. An important factor that influences the choosing of a specific FEC technique in a nano-scale system implementation is its real-time performance, namely its computational complexity. In this paper, we propose a set of rules to decide whether a variable node in a LDPC decoder should update its value in subsequent iterations of the decoding process, or be considered as converged. We show that by carefully choosing the convergence rules for variable nodes, significant reduction of decoding complexity can be achieved with endurable performance loss.
Keywords :
computational complexity; convergence; decoding; fault tolerance; forward error correction; parity check codes; adaptive convergence; computational complexity; fault-tolerant logic; forward error correction; low-density parity check codes decoder; nano-scale system; reduced-complexity decoding; system level hardware-redundant logic; AWGN channels; Binary phase shift keying; Complexity theory; Convergence; Decoding; Iterative decoding; LDPC; adaptive convergenc; min-sum decoding;
Conference_Titel :
SoC Design Conference (ISOCC), 2010 International
Conference_Location :
Seoul
Print_ISBN :
978-1-4244-8633-5
DOI :
10.1109/SOCDC.2010.5682908