DocumentCode :
1975780
Title :
Design and implementation of IEEE 802.16 baseband system on FPGA
Author :
Chen Gu ; Xu Li
Author_Institution :
State Key Lab. of Rail Traffic Control & Safety, Beijing Jiaotong Univ., Beijing, China
fYear :
2011
fDate :
14-16 Oct. 2011
Firstpage :
872
Lastpage :
876
Abstract :
In this paper, a physical-layer baseband modem is discussed based on IEEE 802.16 protocol. It is implemented on Xilinx FPGA and tested correctly in loop-mode. After channel coding, a bit stream goes through constellation mapper, pilot inserting, OFDM(Orthogonal Frequency Division Multiplexing) modulation, PAPR(Peak to Average Power Ratio) reduction and framing module to become 7 symbols in IQ parallel form prepared for RF(Radio Frequency) front end. On condition of loop-mode, these symbols become back to serial bit stream via synchronization, channel estimation, OFDM demodulation, pilot removing and constellation demapper in receiver part. In practice, the entire loop-mode system takes about 120us when clock rate is 40Mhz. As a consequence, the baseband system delay is much lower in order to satisfy the demands for high rate data processing in broadband communication.
Keywords :
OFDM modulation; WiMax; channel coding; channel estimation; field programmable gate arrays; modems; protocols; synchronisation; IEEE 802.16 baseband system; IEEE 802.16 protocol; OFDM demodulation; Xilinx FPGA; broadband communication; channel coding; channel estimation; constellation mapper; loop mode; orthogonal frequency division multiplexing; physical-layer baseband modem; pilot inserting; radiofrequency front end; serial bit stream; synchronization; Baseband System; FPGA; IEEE 802.16; OFDM;
fLanguage :
English
Publisher :
iet
Conference_Titel :
Communication Technology and Application (ICCTA 2011), IET International Conference on
Conference_Location :
Beijing
Type :
conf
DOI :
10.1049/cp.2011.0794
Filename :
6192992
Link To Document :
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