DocumentCode
1977201
Title
Systolic L -U decomposition array with a new reciprocal cell
Author
Jain, V.K. ; Landis, D.L. ; Alvarez, C.E.
Author_Institution
Dept. of Electr. Eng., South Florida Univ., Tampa, FL, USA
fYear
1989
fDate
2-4 Oct 1989
Firstpage
460
Lastpage
465
Abstract
A systolic architecture for L -U decomposition using a recently developed reciprocal cell is presented. The arithmetic of this new cell is based on second-order polynomial interpolation, which results in high speed and inherent stability in inversion. In part, the speed of the cell is realized by use of a special empirical mapping. For the 16-b mantissa of a floating point number, the lookup table size required is 64 words, and the RMS value of the error is approximately one-third of the LSB of the 16-b result
Keywords
cellular arrays; digital arithmetic; interpolation; matrix algebra; parallel architectures; L-U decomposition; LSB; RMS value; arithmetic; empirical mapping; error; floating point number; inversion stability; lookup table size; reciprocal cell; second-order polynomial interpolation; systolic architecture; Arithmetic; Array signal processing; Equations; Matrix decomposition; Polynomials; Radar signal processing; Robustness; Sonar; Speech recognition; Systolic arrays;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design: VLSI in Computers and Processors, 1989. ICCD '89. Proceedings., 1989 IEEE International Conference on
Conference_Location
Cambridge, MA
Print_ISBN
0-8186-1971-6
Type
conf
DOI
10.1109/ICCD.1989.63409
Filename
63409
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