ZONA — An adaptable NoC-based multiprocessor addressed to education on system-on-chip design

The design of multiprocessor system-on-chip (MP-SoC), especially NoC-based system-on-chip is a relatively new issue not yet adequately addressed in undergraduate curricula and textbooks. In this paper we propose a didactic architecture for a NoC-based multiprocessor system-on-chip using a Reconfigurable Instruction Set Processor (RISP) as homogeneous processing element. A simple assembly language was designed and an assembler tool was written aiming to make simpler the development of MP-SoC applications. All the components were designed in VHDL and prototyped using Altera DE2 board.