Investigation of localized versus uniform strain as a performance booster in InAs Tunnel-FETs

This paper investigates the effect of spatially localized versus uniform strain on the performance of n-type InAs nanowire Tunnel FETs. To this purpose we make use of a simulator based on the NEGF formalism and employing an eight-band k·p Hamiltonian, describing the strain implicitly as a modification of the band-structure. Our results indicate that, when the uniform strain degrades the subthreshold slope because of an increased band-to-band-tunneling at the drain, a localized strain at the source side can achieve a better tradeoff between on-current and subthreshold slope than a uniform strain configuration.