• DocumentCode
    1979043
  • Title

    Digital associative memory for word-parrallel Manhattan-distance-based vector quantization

  • Author

    Sasaki, Seiryu ; Yasuda, Masahiro ; Mattausch, Hans Jürgen

  • Author_Institution
    Res. Inst. for Nanodevice & Bio Syst., Hiroshima Univ., Higashi-Hiroshima, Japan
  • fYear
    2012
  • fDate
    17-21 Sept. 2012
  • Firstpage
    185
  • Lastpage
    188
  • Abstract
    Digital Word-parallel associative-memory architecture capable of Manhattan-distance-based vector quantization is reported, which applies frequency dividers and clock counting to realize nearest Manhattan-distance (MD) search. Experimental verification was done with a 65 nm CMOS design implementing 128 reference vectors, each having 16 components and 16 bit per component. For the fabricated test chips 926 ps minimum search time and 2.13 mW power dissipation are measured at 120MHz and Vdd = 1.2V. At lower supply voltage of Vdd = 0.9V and lower frequency of 20MHz the power-dissipation reduces to 130 μW. In comparison to previous digital architecture a factor 100 smaller power delay product (estimated factor 16 when scaled to 65 nm CMOS) is achieved.
  • Keywords
    CMOS integrated circuits; content-addressable storage; frequency dividers; vector quantisation; CMOS design; digital word-parallel associative-memory; frequency 120 MHz; frequency 20 MHz; frequency divider; power 130 muW; power 2.13 mW; power dissipation; size 65 nm; vector quantization; voltage 0.9 V; word-parallel Manhattan-distance; CMOS integrated circuits; Clocks; Delay; Frequency conversion; Quantization; Radiation detectors; Vectors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ESSCIRC (ESSCIRC), 2012 Proceedings of the
  • Conference_Location
    Bordeaux
  • ISSN
    1930-8833
  • Print_ISBN
    978-1-4673-2212-6
  • Electronic_ISBN
    1930-8833
  • Type

    conf

  • DOI
    10.1109/ESSCIRC.2012.6341289
  • Filename
    6341289