DocumentCode :
1980484
Title :
Synchronization and Timing in Packet Networks
Author :
Traore, Karim ; Shenoi, Kishan
Author_Institution :
Symmetricom, NY, USA
fYear :
2010
fDate :
6-10 Dec. 2010
Firstpage :
1
Lastpage :
5
Abstract :
Packet-based methods for transporting timing information are becoming increasingly important as networks shift from circuit-switched to packet-switched architectures. The packet-delay variation inherent in packet networks is a primary source of clock noise. This paper addresses suitable methods for analyzing Packet Delay Variation (PDV) and the impact on synchronization. Metrics appropriate for analysis and masks suitable for verifying conformance are described.
Keywords :
circuit switching; delays; packet radio networks; packet switching; synchronisation; timing; circuit switching; packet delay variation; packet networks; packet switched architectures; synchronization; timing; Clocks; Delay; Noise; Synchronization; Telecommunications;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Global Telecommunications Conference (GLOBECOM 2010), 2010 IEEE
Conference_Location :
Miami, FL
ISSN :
1930-529X
Print_ISBN :
978-1-4244-5636-9
Electronic_ISBN :
1930-529X
Type :
conf
DOI :
10.1109/GLOCOM.2010.5683167
Filename :
5683167
Link To Document :
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