A CMOS LDO regulator with high PSR using Gain Boost-Up and Differential Feed Forward Noise Cancellation in 65nm process

Author

Yuk, Young-Sub ; Jung, Seungchul ; Lee, Byunghun ; Wang, Se-Won ; Kim, Chul ; Cho, Gyu-Hyeong

Author_Institution

Electron. Eng., KAIST, Daejeon, South Korea

fYear

2012

fDate

17-21 Sept. 2012

Firstpage

462

Lastpage

465

Abstract

A 65nm CMOS Low Drop-Out (LDO) Regulator is presented employing Gain Boost-Up and Differential Feed Forward Noise Cancellation (DFFNC) to maximize the Power Supply Rejection. The gain boost-up consists of both negative feedback and positive feedback in the error amplifier. With a 1.2V supply voltage, this LDO regulator has a 200mV drop-out voltage and the ability to handle a maximum 25mA load current. The measurement results show a -47dB PSR ratio up to 10MHz and 0.8% of load regulation for the full load current change.

Keywords

CMOS analogue integrated circuits; amplifiers; circuit feedback; circuit noise; feedforward; interference suppression; load regulation; voltage regulators; CMOS LDO regulator; CMOS low drop-out regulator; DFFNC; PSR ratio; current 25 mA; differential feed forward noise cancellation; drop-out voltage; error amplifier; gain boost-up; load current; load regulation; negative feedback; positive feedback; power supply rejection; size 65 nm; voltage 1.2 V; voltage 200 mV; CMOS integrated circuits; Feeds; Gain; Mirrors; Negative feedback; Noise; Regulators;

fLanguage

English

Publisher

ieee

Conference_Titel

ESSCIRC (ESSCIRC), 2012 Proceedings of the

Conference_Location

Bordeaux

ISSN

1930-8833

Print_ISBN

978-1-4673-2212-6

Electronic_ISBN

1930-8833

Type

conf

DOI

10.1109/ESSCIRC.2012.6341355

Filename

6341355