DocumentCode
1981106
Title
All digital built-in delay and crosstalk measurement for on-chip buses
Author
Su, Chauchin ; Chen, Yue-Tsang ; Huang, Mu-Jeng ; Chen, Gen-Nan ; Lee, Chung-Len
Author_Institution
Dept. of Electr. Eng., Nat. Central Univ., Chung-Li, Taiwan
fYear
2000
fDate
2000
Firstpage
527
Lastpage
531
Abstract
This paper proposes an all digital on-chip bus delay and crosstalk measurement methodology. A diagnosis procedure is derived to distinguish the delay faults in drivers, receivers, and wires. The crosstalk profile is plotted by monitoring the changes in delay with the presence of the crosstalk. The distinguished features include all digital design and low hardware overhead. The SPICE simulation results prove the feasibility of the methodology
Keywords
crosstalk; delays; digital integrated circuits; fault diagnosis; integrated circuit measurement; integrated circuit noise; integrated circuit testing; all digital design; all digital onchip measurement method; built-in crosstalk measurement; built-in delay measurement; crosstalk profile plotting; deep submicron onchip buses; delay faults; diagnosis procedure; measurement methodology; on-chip buses; Capacitance; Circuit faults; Circuit testing; Clocks; Crosstalk; Delay; Driver circuits; Semiconductor device measurement; Timing; Wires;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe Conference and Exhibition 2000. Proceedings
Conference_Location
Paris
Print_ISBN
0-7695-0537-6
Type
conf
DOI
10.1109/DATE.2000.840836
Filename
840836
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