DocumentCode :
1981596
Title :
Retargeting of compiled simulators for digital signal processors using a machine description language
Author :
Pees, Stefan ; Hoffmann, Andreas ; Meyr, Heinrich
Author_Institution :
Integrated Signal Process. Syst., Tech. Hochschule Aachen, Germany
fYear :
2000
fDate :
2000
Firstpage :
669
Lastpage :
673
Abstract :
This paper presents a methodology to retarget the technique of compiled simulation for digital signal processors (DSPs) using the modeling language LISA. In the past, the principle of compiled simulation as means for speeding up simulators has only been implemented for specific DSP architectures. The new approach presented here discusses methods of integrating compiled simulation techniques to retargetable simulation tools. The principle and the implementation are discussed in this paper and results for the TI TMS320C6201 DSP are presented
Keywords :
circuit simulation; digital signal processing chips; digital simulation; hardware description languages; hardware-software codesign; instruction sets; LISA; TI TMS320C6201 DSP; compiled simulators; digital signal processors; machine description language; modeling language; Acceleration; Buildings; Computer architecture; Digital signal processing; Digital signal processing chips; Digital signal processors; Hardware design languages; Pipelines; Runtime; Software performance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition 2000. Proceedings
Conference_Location :
Paris
Print_ISBN :
0-7695-0537-6
Type :
conf
DOI :
10.1109/DATE.2000.840858
Filename :
840858
Link To Document :
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