DocumentCode
1983138
Title
A Performance Model for Memory Bandwidth Constrained Applications on Graphics Engines
Author
Ma, Lin ; Chamberlain, Roger D.
Author_Institution
Dept. of Comput. Sci. & Eng., Washington Univ. in St. Louis, St. Louis, MO, USA
fYear
2012
fDate
9-11 July 2012
Firstpage
24
Lastpage
31
Abstract
Graphics engines are excellent execution platforms for high-throughput computations that exploit a large degree of available parallelism. The achieved performance is, however, highly dependent on the access patterns that the applicationimposes on the memory subsystem. Here, we propose an analytic model that helps improve the understanding of the performance of memory-limited kernels that employ randommemory access schemes, especially as impacted by cache andvarious configuration parameters that can be used to tunekernel execution, such as the number of blocks and the number of threads per block. The analytic model is first explored through the use of a synthetic micro-benchmark, which is then followed by an empirical validation using a pair of production applications used in computational biology.
Keywords
biology computing; cache storage; computer graphics; pattern recognition; access patterns; cache andvarious configuration parameters; computational biology; graphics engines; high-throughput computations; memory bandwidth constrained applications; memory-limited kernels; performance model; random memory access schemes; synthetic micro-benchmark; Analytical models; Computational modeling; Engines; Graphics; Instruction sets; Kernel; Throughput; BLAST; DNA classification; GPGPU; hashing;
fLanguage
English
Publisher
ieee
Conference_Titel
Application-Specific Systems, Architectures and Processors (ASAP), 2012 IEEE 23rd International Conference on
Conference_Location
Delft
ISSN
2160-0511
Print_ISBN
978-1-4673-2243-0
Electronic_ISBN
2160-0511
Type
conf
DOI
10.1109/ASAP.2012.19
Filename
6341450
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