DocumentCode
1983226
Title
On-line Decimal Adder with RBCD Representation
Author
Vega, Carlos Garcia ; Navarro, Sonia Gonzalez ; Moreno, Julio Villalba ; Zapata, Emilio L.
Author_Institution
Dept. Comput. Archit., Univ. of Malaga, Malaga, Spain
fYear
2012
fDate
9-11 July 2012
Firstpage
53
Lastpage
60
Abstract
In this paper we present the design of an on-line adder dealing with two RBCD numbers. This basic element is intended to be be used in any on-line system in which the addition is involved. We obtain the on-line adder by serialization of a recent parallel RBCD adder with minimum latency.To reduce the cycle time a pipelined version is proposed. To deal with data stream the throughput has been reduced to its theoretical minimum possible value by a negligible cost hardware modification. Finally, actual implementation results for 16 digits (i.e. decimal64 format) are presented.
Keywords
adders; pipeline arithmetic; RBCD representation; data stream; online decimal adder; parallel RBCD adder; pipelined version; Adders; Computer architecture; Decision support systems; Delay; Encoding; Equations; Registers; RBCD; decimal; on-line adder; redundant;
fLanguage
English
Publisher
ieee
Conference_Titel
Application-Specific Systems, Architectures and Processors (ASAP), 2012 IEEE 23rd International Conference on
Conference_Location
Delft
ISSN
2160-0511
Print_ISBN
978-1-4673-2243-0
Electronic_ISBN
2160-0511
Type
conf
DOI
10.1109/ASAP.2012.27
Filename
6341453
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