Multi-clock domain analysis and modeling of all-digital frequency synthesizers

All-digital phase-locked loops (ADPLLs) are inherently multi-rate systems with time-varying behavior. In support to this statement accurate multi-clock domain models of ADPLL frequency synthesizers are presented. Their analytically derived phase transfer characteristics accurately predict second order effects (such as spectral aliasing) that are not captured using conventional modeling approaches. The results are validated through simulations using well accepted time-domain modeling techniques of an RF ADPLL.