First order noise shaping in all digital PLLs

In this paper we introduce the architectures of TDC and accumulator-based ADPLLs. Then, we briefly describe the block and timing diagrams of Gated-Ring-Oscillator-based and Local Oscillator-based TDCs. We present the governing equations of both TDCs and we calculate the resolution of the "first order noise shaping TDC plus moving average filter" system. We show briefly the effect of the phase error on the output of the "LO TDC plus moving average filter" system and we propose an extended LO TDC that can measure the phase error. We derive equations to predict the resolution of the extended LO TDC and we confirm the predictions with Matlab simulations. Finally, we compare in simulation the power spectral densities of the phase errors of a Gated-Ring-Oscillator-based ADPLL and of an accumulator based ADPLL with the extended LO TDC.