Title :
A new built-in self-test method based on prestored testing
Author :
Edirisooriya, G. ; Edirisooriya, Geetani ; Robinson, John P.
Author_Institution :
Motorola Comput. Group., Tempe, AZ, USA
Abstract :
Built-in-self-test (BIST) schemes provide on-chip circuitry to generate test vectors and to analyze output responses so that testing can be performed without using expensive external testers. The authors present a unified approach to test pattern generation and output compaction. ISCAS benchmark circuits are used to show the applicability of the proposed method.<>
Keywords :
VLSI; application specific integrated circuits; built-in self test; integrated circuit testing; logic testing; ISCAS benchmark circuits; built-in self-test method; output compaction; output responses; prestored testing; test pattern generation; test vectors; Automatic testing; Benchmark testing; Built-in self-test; Circuit faults; Circuit testing; Compaction; Electrical fault detection; Fault detection; Read only memory; Test pattern generators;
Conference_Titel :
VLSI Test Symposium, 1993. Digest of Papers., Eleventh Annual 1993 IEEE
Conference_Location :
Atlantic City, NJ, USA
Print_ISBN :
0-8186-3830-3
DOI :
10.1109/VTEST.1993.313315
