A 2.4µW Wake-up Receiver for wireless sensor nodes with −71dBm sensitivity

Author

Hambeck, Christian ; Mahlknecht, Stefan ; Herndl, Thomas

Author_Institution

Inst. of Comput. Technol., Vienna Univ. of Technol., Vienna, Austria

fYear

2011

fDate

15-18 May 2011

Firstpage

534

Lastpage

537

Abstract

This paper presents a complete ultra-low power receiver with direct down conversion architecture. It is designed as Wake-up Receiver for wireless sensor nodes. The 130nm CMOS chip includes envelope detector, low noise baseband amplifier, PGA, mixed-signal correlation unit and auxiliaries for stand-alone operation. At 868MHz, a receiver sensitivity of -71dBm is achieved with total power consumption of 2.4μW at 1.0V supply by means of baseband correlation over 7ms with 64 bit pattern, 99% detection probability and a false wake-up rate of 10³/s.

Keywords

CMOS integrated circuits; electronics packaging; low noise amplifiers; low-power electronics; radio receivers; wireless sensor networks; CMOS chip; PGA; complete ultra-low power receiver; direct down conversion architecture; envelope detector; frequency 868 MHz; low noise baseband amplifier; mixed-signal correlation unit; power 2.4 muW; power consumption; receiver sensitivity; size 130 nm; stand-alone operation; time 7 ms; voltage 1 V; wake-up receiver; wireless sensor nodes; word length 64 bit; Baseband; Correlation; Noise; Radio frequency; Receivers; Sensitivity; Wireless sensor networks;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (ISCAS), 2011 IEEE International Symposium on

Conference_Location

Rio de Janeiro

ISSN

0271-4302

Print_ISBN

978-1-4244-9473-6

Electronic_ISBN

0271-4302

Type

conf

DOI

10.1109/ISCAS.2011.5937620

Filename

5937620