DocumentCode :
1987424
Title :
A numerical model using the phase field method for stress induced voiding in a metal line during thermal bake
Author :
Yong-Seog Oh ; Hyerim Lee ; Avci, I. ; Park, Soojin ; Jongsung Jeon ; Jinseok Kim ; Sari, Windu
Author_Institution :
Silicon Eng. Group, Synopsys Inc., Mountain View, CA, USA
fYear :
2013
fDate :
3-5 Sept. 2013
Firstpage :
13
Lastpage :
16
Abstract :
We present a numerical model using the phase-field method (PFM) for stress-induced-voiding (SIV) in a metal line. The model was verified by comparison with the typical stress-migration (SM) analytical model. We investigated the effects of flaw location and density on time-to-failure (TTF). The model was applied to the failure analysis of the BEOL process of a 0.13um device for automobiles.
Keywords :
failure analysis; numerical analysis; semiconductor device models; semiconductor device reliability; BEOL process; failure analysis; flaw location; metal line; size 0.13 mum; stress-migration analytical model; thermal bake; time-to-failure; Analytical models; Mathematical model; Metals; Numerical models; Resistance; Simulation; Stress; PFM; SIV; SM; reliability; simulation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Simulation of Semiconductor Processes and Devices (SISPAD), 2013 International Conference on
Conference_Location :
Glasgow
ISSN :
1946-1569
Print_ISBN :
978-1-4673-5733-3
Type :
conf
DOI :
10.1109/SISPAD.2013.6650562
Filename :
6650562
Link To Document :
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