A process/device/circuit/system compatible simulation framework for poly-Si TFT based SRAM design

Operation characteristics of low temperature poly silicon thin-film transistor (LTPS-TFT) based systems vary significantly with design choices and parameters (i.e., process, device, circuit and system). Due to the lack of cross-layer simulation tool, conventional designs only optimize the design layers in isolation, leading to sub-optimal solutions. We present a cross-layer simulation framework for the design of LTPS-TFT Static Random Access Memory (SRAM). The proposed simulation framework optimizes design parameters considering the entire design space and hence, greatly reduces design complexity and efforts. The benefits of our proposed framework are illustrated by case studies.