Title :
Hardware implementation challenges of modern error control decoders
Author :
Schlegel, Christian ; Gaudet, Vincent
Author_Institution :
Dept. of Comput. Sci., Univ. of Alberta, Edmonton, AB, Canada
Abstract :
The basic design challenges for large-scale modern error control decoders based on message passing are examined in this review and exploratory paper. Space, complexity, and power consumption figures are of most interest to the design engineer, and the state-of-the art of current implementations are presented. Fundamental limits of performance versus power and complexity are discussed, and innovative state-of-the art approaches to address these challenges are highlighted.
Keywords :
codecs; error correction codes; message passing; power consumption; error control decoders; hardware implementation; message passing; power consumption; Decoding; Iterative decoding; Logic gates; Switches; Very large scale integration; Wires;
Conference_Titel :
Circuits and Systems (ISCAS), 2011 IEEE International Symposium on
Conference_Location :
Rio de Janeiro
Print_ISBN :
978-1-4244-9473-6
Electronic_ISBN :
0271-4302
DOI :
10.1109/ISCAS.2011.5937931
