Implementation of all-digital wideband RF frequency synthesizers in 65-nm CMOS technology

Author

Rapinoja, Tapio ; Xu, Liangge ; Stadius, Kari ; Ryynänen, Jussi

Author_Institution

Sch. of Electr. Eng., Dept. of Micro & Nanosci., Aalto Univ., Espoo, Finland

fYear

2011

fDate

15-18 May 2011

Firstpage

1948

Lastpage

1951

Abstract

This paper presents two all-digital RF frequency synthesizers implemented in 65-nm CMOS: a digital period frequency synthesizer and an all-digital phase-locked loop. This paper is especially focused on the implementation issues and practical challenges of digital frequency synthesizers for wideband radio systems. Moreover, the paper presents implementations and experimental results of these two frequency synthesizers targeted for cognitive radio spectrum sensing applications.

Keywords

CMOS digital integrated circuits; cognitive radio; digital phase locked loops; frequency synthesizers; radiofrequency integrated circuits; CMOS technology; all-digital phase-locked loop; all-digital wideband RF frequency synthesizers; cognitive radio spectrum sensing applications; digital period frequency synthesizer; size 65 nm; wideband radio systems; Computer architecture; Frequency conversion; Frequency synthesizers; Phase noise; Synthesizers; Time frequency analysis;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (ISCAS), 2011 IEEE International Symposium on

Conference_Location

Rio de Janeiro

ISSN

0271-4302

Print_ISBN

978-1-4244-9473-6

Electronic_ISBN

0271-4302

Type

conf

DOI

10.1109/ISCAS.2011.5937971

Filename

5937971