• DocumentCode
    1996909
  • Title

    Performance evaluation of ECC scalar multiplication using parallel modular algorithms on mobile devices

  • Author

    Vanderlei de Arruda, Tiago ; Venturini, Yeda Regina ; Sakata, Tiemi Christine

  • Author_Institution
    Comput. Dept., Fed. Univ. of Sao Carlos, São Carlos, Brazil
  • fYear
    2015
  • fDate
    21-23 July 2015
  • Firstpage
    153
  • Lastpage
    156
  • Abstract
    Mobile devices, such as smartphones, allow people around the world to access a huge amount of online applications anywhere and anytime. Elliptic Curve Cryptography (ECC) algorithm can be used in mobile devices to trust the access to these applications. Scalar multiplication is the main and most expensive operation in ECC and its cost is directly related to the size of the key used. It is composed of a lot of modular arithmetic operations (addition, subtraction, squaring, multiplication and inversion), defined by the coordinate system used. Using the short Weierstrass Jacobian coordinate system, the modular multiplication and squaring are the most costly operations performed in our experiments. In this paper we analyze the performance of scalar multiplication using a variety of sequential and parallel modular multiplication algorithms with standardized NIST curves. To predict the timings for highorder curves, it is used a 1536-bit pairing-friendly curve available on RELIC. Experiments were performed on a SabreLite IMX6Quad board with a quad-core ARM cortex A9 (ARMv7 architecture) processor, which allows the analysis of these scalar multiplications on a mobile device architecture. Results show that Bipartite 2th timings were faster than the sequential ones for 1536-bit curves. Bipartite timings were strictly close to the best sequential timing for 521 bits, indicating that for a not too much longer key, parallel algorithms´ timings are capable to overcome the sequential ones.
  • Keywords
    mobile computing; parallel algorithms; public key cryptography; ECC algorithm; ECC scalar multiplication; SabreLite IMX6Quad board; addition operation; bipartite timings; elliptic curve cryptography; inversion operation; mobile devices; modular arithmetic operations; modular multiplication algorithms; multiplication operation; parallel modular algorithms; performance evaluation; quad-core ARM cortex A9 processor; short Weierstrass Jacobian coordinate system; smart phones; squaring operation; subtraction operation; Algorithm design and analysis; Elliptic curve cryptography; Elliptic curves; Mobile handsets; Parallel algorithms; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Privacy, Security and Trust (PST), 2015 13th Annual Conference on
  • Conference_Location
    Izmir
  • Type

    conf

  • DOI
    10.1109/PST.2015.7232967
  • Filename
    7232967