DocumentCode
1997168
Title
A Multi-Level Optimization Method for Stencil Computation on the Domain that is Bigger than Memory Capacity of GPU
Author
Guanghao Jin ; Endo, T. ; Matsuoka, Shingo
Author_Institution
Tokyo Inst. of Technol., JST-CREST, Tokyo, Japan
fYear
2013
fDate
20-24 May 2013
Firstpage
1080
Lastpage
1087
Abstract
The problem size of the stencil computation on GPU is limited by the GPU memory capacity, which is typically smaller than that of host memory. This paper proposes and evaluates a multi-level optimization method for stencil computation to achieve both larger problem size than GPU memory and high performance. It is based on the temporal blocking method, which has been proposed to improve memory access locality of stencil computation. It applies temporal blocking to 2 layers to improve locality of computation. Then it reuses former result to solve redundant problem. Furthermore, it parallels computation with communication by 2 additional buffers. Evaluation of 7-point stencil simulation on 3D domain shows that our new method achieves 16.74 times better performance than naive method and 1.35 times better performance than other methods on average.
Keywords
graphics processing units; optimisation; parallel processing; GPU memory capacity; memory access locality; multilevel optimization method; stencil computation; temporal blocking method; Computer architecture; Graphics processing units; Instruction sets; Kernel; Optimization methods; Performance evaluation; Supercomputers; GPU memory capacity; multi-level optimization; stencil computation; temporal blocking;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel and Distributed Processing Symposium Workshops & PhD Forum (IPDPSW), 2013 IEEE 27th International
Conference_Location
Cambridge, MA
Print_ISBN
978-0-7695-4979-8
Type
conf
DOI
10.1109/IPDPSW.2013.58
Filename
6650993
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