Prototype of an SMP based sub-farm of the ATLAS event filter

The Event Filter system in the ATLAS experiment at the CERN Large Hadron Collider (LHC) is required to implement the final on-line event selection in the Data Acquisition system on a processor farm. The Symmetric Multi Processor (SMP) implementation of the Event Filter is attractive because it offers advantages in data sharing and transfer between the different hardware and software components. In order to achieve a better exploitation of the hardware resources the sub-farm code has been implemented as a single multi-threaded process, complying to Posix 1003.1c standard. Several tests have been performed in order to measure the global throughput of the sub-farm and to check the software and hardware characteristics. All the results obtained until now indicate that the hardware and software architectures do not limit the behaviour of the sub-farm. They also show the robustness and scalability of the software multi-threaded architecture, and the absence of bandwidth limits and bottleneck on transfer