Effects of Etching Residue on Positive Shift of Threshold Voltage in Amorphous Indium–Zinc-Oxide Thin-Film Transistors Based on Back-Channel-Etch Structure

The electronic properties of amorphous indium-zinc-oxide (IZO) thin film transistors (TFTs) with back-channel-etch (BCE) structure was investigated. In the cyclic-transfer characteristics test, the initial transfer curve of BCE-type transistors exhibited a significant hysteresis phenomenon under a high-gate bias (V_GS). However, in the following cycles of the transfer curves, the hysteresis was significantly reduced, and the curves nearly overlapped the reverse sweeping of the initial transfer characteristics. Additionally, the threshold voltage (V_th) shift in the initial hysteresis loops increased with the increase of the V_GS. Those phenomena may be attributed to the molybdenum oxide (MoO₃) residue generated during the patterning of the source/drain electrodes using hydrogen peroxide (H₂O₂)-based etchants. It is believed that etching residue acts as the acceptor-like states trapping electrons into the back interface between the channel and the residual layer. To eliminate the V_th shift in BCE-TFTs, SF₆ plasma is applied to the back surface of the IZO channel layer. The modified devices show a more stable V_th.