• DocumentCode
    2005247
  • Title

    Designed and implemented of graphics rasterization algorithm with FPGA

  • Author

    Hengyong Jiang ; Xunzhi Wang ; Mengyao Zhu ; Feng Guo

  • Author_Institution
    Sch. of Commun. & Inf. Eng., Shanghai Univ., Shanghai, China
  • fYear
    2011
  • fDate
    14-16 Nov. 2011
  • Firstpage
    325
  • Lastpage
    328
  • Abstract
    The rasterization stage, which is an important part of a graphics processing unit, always requires huge operations and is the bottleneck of the performance, especially for mobile devices. In this paper, the authors research the rasterization algorithm and optimize some rasterization algorithm. In the last, the authors implement a simple rasterization engine with small hardware resource of FPGA.
  • Keywords
    field programmable gate arrays; graphics processing units; logic design; FPGA; graphics processing unit; graphics rasterization algorithm; hardware resource; rasterization engine; 3D graphics; FPGA; Hardware accelerate;
  • fLanguage
    English
  • Publisher
    iet
  • Conference_Titel
    Wireless Mobile and Computing (CCWMC 2011), IET International Communication Conference on
  • Conference_Location
    Shanghai
  • Type

    conf

  • DOI
    10.1049/cp.2011.0902
  • Filename
    6194859