DocumentCode
2005688
Title
Optimizing technology mapping for FPGAs using CAMs
Author
Lucas, Joshua M. ; Hoare, Raymond ; Jones, Alex K.
Author_Institution
Pittsburgh Univ., PA, USA
fYear
2005
fDate
18-20 April 2005
Firstpage
293
Lastpage
294
Abstract
This paper describes an inexact string matching scheme devised to improve upon the LURU technique. The scheme uses a set of text strings called common subcircuit expressions (CSEs) to map a high percentage of the subcircuits in a netlist. The inexact matching scheme leverages the don´t-care feature of ternary CAMs. Subcircuits are represented as standard-length strings that include wildcards. These strings are called homogeneous LURU strings (HLSs). LURU improves technology mapping by reducing the area requirements of LUT implementations. It also facilitates the profiling of circuits for the discovery of common subcircuits.
Keywords
content-addressable storage; field programmable gate arrays; optimisation; string matching; FPGA; LURU technique; common subcircuit expression; content-addressable storage; inexact string matching; technology mapping optimization; ternary CAM; CADCAM; Cams; Circuit optimization; Circuit topology; Computer aided manufacturing; Costs; Field programmable gate arrays; High level synthesis; Libraries; Table lookup;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Custom Computing Machines, 2005. FCCM 2005. 13th Annual IEEE Symposium on
Print_ISBN
0-7695-2445-1
Type
conf
DOI
10.1109/FCCM.2005.50
Filename
1508559
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