Trace sampling for design trade-offs of microprocessors using SPEC Integer benchmarks

Trace-driven simulation has been used by a large number of design groups to study the performance of computer systems. This approach suffers from the high cost of trace generation and trace execution. Trace sampling techniques have been used for the study of cache memory systems as well as superscalar microprocessors. In spite of the desired features of sampled traces for studying cache behavior, the accuracy of such traces for general processor behaviors is unknown. Our experiments have shown that much smaller representative sampled traces can be generated for a class of applications such as SPEC Integer benchmarks to reduce the cost of design trade-offs and performance projections of the superscalar microprocessors