A full-rate software implementation of an IEEE 802.11a compliant digital baseband transmitter

Author

Meeuwsen, Michael J. ; Sattari, Omar ; Baas, Bevan M.

Author_Institution

Dept. of Electr. & Comput. Eng., California Univ., Davis, CA, USA

fYear

2004

fDate

13-15 Oct. 2004

Firstpage

124

Lastpage

129

Abstract

A software based IEEE 802.11a digital baseband transmitter has been implemented on a highly parallel single-chip DSP. The processing platform is a programmable and reconfigurable asynchronous array of simple processors (AsAP) that is well matched to complex system workloads such as 802.11a. The transmitter is the first fully-compliant 802.11a software implementation, and is the first full-rate software implementation. The transmitter also complies with the high-rate portions of the 802.11g standard. It operates over all 8 data rates, includes additional upsampling and filtering functions, and sustains transmissions at 54 Mb/s on a 22-processor array; it is expected to occupy less than 20 mm² in 0.18 μm CMOS.

Keywords

CMOS digital integrated circuits; digital radio; digital signal processing chips; parallel architectures; programmable logic arrays; radio transmitters; reconfigurable architectures; software radio; wireless LAN; 0.18 micron; 54 Mbit/s; CMOS; IEEE 802.11a; IEEE 802.11g; digital baseband transmitter; filtering functions; full-rate software implementation; parallel single-chip DSP; programmable asynchronous array of processors; reconfigurable asynchronous array of processors; software defined radio; upsampling functions; Application software; Baseband; Computer architecture; Digital signal processing; OFDM; Radio transmitters; Software radio; Software standards; Throughput; Wireless LAN;

fLanguage

English

Publisher

ieee

Conference_Titel

Signal Processing Systems, 2004. SIPS 2004. IEEE Workshop on

Print_ISBN

0-7803-8504-7

Type

conf

DOI

10.1109/SIPS.2004.1363036

Filename

1363036