Title :
Optimal clustering and statistical identification of defective ICs using IDDQ testing
Author :
Rao, A. ; Jayasumana, A.P. ; Malaiya, Y.K.
Author_Institution :
Colorado State Univ., Fort Collins, CO, USA
Abstract :
Instead of relying on setting an arbitrary threshold current value as in traditional loop testing, clustering based test technique relies on the characteristics of an IC with respect to all the other ICs in a lot to make a test decision. An improvement in the cluster analysis technique for IDDQ testing is presented. Results of applying this technique to data collected on a high volume graphics chip are presented. The results are also compared against a newer more innovative form of IDDQ testing
Keywords :
digital integrated circuits; identification; integrated circuit testing; production testing; statistical analysis; IDDQ testing; cluster analysis technique; clustering based test technique; defective ICs; high volume graphics chip; optimal clustering; statistical identification; Circuit testing; Current measurement; Foundries; Geometry; Graphics; Integrated circuit testing; Logic testing; Production; System-on-a-chip; Threshold current;
Conference_Titel :
Defect Based Testing, 2000. Proceedings. 2000 IEEE International Workshop on
Conference_Location :
Montreal, Que.
Print_ISBN :
0-7695-0637-2
DOI :
10.1109/DBT.2000.843687
