SDVM^R: A Scalable Firmware for FPGA-Based Multi-core Systems-on-Chip

FPGAs offering dynamic reconfiguration make new approaches for parallel computing possible: Changing the number and type of processing elements at runtime offers an important step to adaptive behaviour of systems-on-chip. In this paper the implementation of a virtualization layer between applications and FPGA-hardware is described. This virtualization allows a transparent runtime-reconfiguration of the underlying hardware for adaption to changing system environments. The application does not see the underlying, even heterogeneous hardware. Many of the requirements for such a virtualization layer are met by the SDVM, the scalable dataflow-driven virtual machine. This paper describes some aspects of the reimplementation and adaptation of the SDVM to modern platform FPGAs. It describes different possible approaches to use the available resources and discusses several technical questions regarding the implementation.