A hardware platform for B-ISDN services multiplexing: design and performances of AAL and ATM layers

The ATM technique has been identified as adequate to transport a wide variety of high-speed data services; moreover, the need of high-performance leads to a hardware implementation of the AAL and ATM protocol layers. A generic customer premises network (CPN) with capabilities of multiplexing and adapting different data services (The CPN can be addressed as a service multiplexer as well as an interworking unit), is examined. In particular a hardware architecture with centralized AAL 3/4 (common part) and ATM protocol functions is considered: all data services share both the AAL and ATM buffers while they keep separate upper layers. The mixed data flows are controlled by a shaping function, located into the ATM layer; this function ensures that the ATM cells are transmitted according to the parameters describing the traffic behavior of each VP/VC circuits, as shown in CCTT Rec. I.371. Two different architectures have been analyzed: one based on a unique AAL/ATM shared buffer, the other based on two separate buffers (one for each layer); the performances of these two models are given. The work is being carried out in the framework of the Italtel activity on ATM (started since the 1980s from the EEC RACE experiences) whose major objective is the introduction of the ATM switching in the public TLC domain (a flexible ATM cross connect UTXC is being developed)