FPGA HIL simulation of a linear system block for strongly coupled system applications

This paper introduces a hardware simulation flow that is based on the Xilinx System Generator Tool (XSG), of an architecture for solving dense linear systems, presented as a strongly coupled system, which is in turn based on Gaussian Elimination using an FPGA. A functional verification process is achieved by taking advantage of the XSG, allowing both software and hardware-in-the-loop (HIL) simulations and using the respective results achieved in Matlab as a reference model. The linear system block embedded in the XSG can handle single, double and custom data precision, following the IEEE 754 floating point standard. The current architecture improves the use of internal RAM of the selected FPGA device (Virtex-5) through a special Memory Access Unit, reducing the data access among this RAM and the different modules in the architecture. Examples of systems of six equations, which are suitable for some robotics applications, have been used for comparing the performance of the Linear System block and Matlab, the latter used as a statistical estimator, in order to validate the data results.