DocumentCode
2014924
Title
Delta Iddq for testing reliability
Author
Powell, Theo J. ; Pair, James ; John, Melissa St ; Counce, Doug
Author_Institution
Texas Instrum. Inc., Dallas, TX, USA
fYear
2000
fDate
2000
Firstpage
439
Lastpage
443
Abstract
Point defects, which cause small current increases and potentially early failures, can be masked by increased chip background currents at elevated temperatures. The difficulty of screening point defects will likely also occur in denser geometries. Delta Iddq is shown to help distinguish between early fail and reliable chips at these elevated temperatures. Memory application demonstrates that a variety of delta Iddq tests can screen early fail defects
Keywords
CMOS integrated circuits; application specific integrated circuits; failure analysis; integrated circuit reliability; integrated circuit testing; ASICs; CMOS; Delta Iddq; chip background currents; denser geometries; early failures; elevated temperatures; point defects; testing reliability; Application specific integrated circuits; Geometry; Hip; Instruments; Logic testing; Manufacturing; Stress; Tellurium; Temperature; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 2000. Proceedings. 18th IEEE
Conference_Location
Montreal, Que.
ISSN
1093-0167
Print_ISBN
0-7695-0613-5
Type
conf
DOI
10.1109/VTEST.2000.843876
Filename
843876
Link To Document