A Flexible Memory-Mapping Scheme for Parallel Turbo Decoders with Periodic Interleavers

Almost regular permutation (ARP) and quadratic permutation polynomials (QPP) are two common types of interleavers for parallel turbo decoding. However, for a turbo decoder using such an interleaver, previous memory-mapping schemes are applicable only if, P, the number of processors used, divides L, the interleaver length, and P satisfies various other constraints. In this paper, we introduce a novel memory-mapping scheme that removes these restrictions and allows the user more flexibility in determining the numbers of processors to be used, at the expense of some overhead.