DocumentCode :
2018785
Title :
An 8GHz, 0.45dB NF CMOS LNA employing noise squeezing
Author :
Lee, Wooram ; Afshari, Ehsan
Author_Institution :
Sch. of Electr. & Comput. Eng., Cornell Univ., Ithaca, NY, USA
fYear :
2011
fDate :
5-7 June 2011
Firstpage :
1
Lastpage :
4
Abstract :
A LNA using noise squeezing is designed in a 65 nm CMOS. The noise squeezing occurs through phase sensitive gain implemented by parametric process. This process is carried out inside a nonlinear resonator where energy transfers from a pump to the signal. When the pump frequency is twice that of the signal, the amplifier suppresses one of two quadrature components of the input noise. This concept is exploited to realize an 8 GHz LNA with 0.45 dB NF for non-suppressed quadrature.
Keywords :
CMOS analogue integrated circuits; interference suppression; low noise amplifiers; resonators; NF CMOS LNA; frequency 8 GHz; input noise; noise figure 0.45 dB; noise squeezing; nonlinear resonator; nonsuppressed quadrature; parametric process; phase sensitive gain; pump frequency; quadrature components; size 65 nm; CMOS integrated circuits; Frequency measurement; Gain; Gain measurement; Noise; Noise measurement; Resonant frequency; Low-noise amplifiers; noise squeezing; nonlinear circuits; phase-sensitive gain; varactors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radio Frequency Integrated Circuits Symposium (RFIC), 2011 IEEE
Conference_Location :
Baltimore, MD
ISSN :
1529-2517
Print_ISBN :
978-1-4244-8293-1
Electronic_ISBN :
1529-2517
Type :
conf
DOI :
10.1109/RFIC.2011.5940695
Filename :
5940695
Link To Document :
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