DocumentCode :
2031913
Title :
Power versus quality trade-offs for adaptive real-time applications
Author :
Nelson, Andrew ; Akesson, Benny ; Molnos, Anca ; te Pas, Sjoerd ; Goossens, Kees
Author_Institution :
Delft Univ. of Technol., Delft, Netherlands
fYear :
2012
fDate :
11-12 Oct. 2012
Firstpage :
75
Lastpage :
84
Abstract :
Electronic devices are expected to accommodate evermore complex functionality. Portable devices, such as mobile phones, have experienced a rapid increase in functionality, while at the same time being constrained by the amount of energy that may be stored in their batteries. Dynamic Voltage and Frequency Scaling (DVFS) is a common technique that is used to trade processor speed for a reduction in power consumption. Adaptive applications can reduce their output quality in exchange for a reduction in their execution time. This exchange has been shown to be useful for meeting temporal constraints, but its usefulness for reducing energy/power consumption has not been investigated. In this paper, we present a technique that uses existing DVFS methods to trade a quality decrease for lower power/energy consumption through an intermediary reduction in execution time. Our technique achieves this while meeting soft and/or hard time/energy/power constraints. We demonstrate the applicability of our technique on an adaptive H.263 decoder application, running on a predictable hardware platform that is prototyped on an FPGA. We further contribute an experimental evaluation of the H.263 decoder´s scalable mechanisms, in their ability to trade quality for temporal/energy/power. From experimentation, we show that our quality trading technique is able to achieve up to a 45% increase in the number of frames decoded for the same amount of energy, in comparison to frequency scaling alone, but with a quality reduction of up to 22dB Peak Signal-to-Noise Ratio (PSNR).
Keywords :
energy consumption; field programmable gate arrays; microprocessor chips; portable computers; power aware computing; real-time systems; video coding; DVFS methods; FPGA; H.263 decoder scalable mechanisms; PSNR; adaptive H.263 decoder application; adaptive real-time applications; complex functionality; dynamic voltage and frequency scaling; electronic devices; energy constraints; energy consumption; execution time; mobile phones; portable devices; power constraints; power consumption; power trade-offs; predictable hardware platform; processor speed; quality reduction; quality trade-offs; quality trading technique; signal-to-noise ratio; temporal constraints; time constraints; Embedded Systems; Low-power design; Real-time systems;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Embedded Systems for Real-time Multimedia (ESTIMedia), 2012 IEEE 10th Symposium on
Conference_Location :
Tampere
Print_ISBN :
978-1-4673-4968-0
Electronic_ISBN :
978-1-4673-4966-6
Type :
conf
DOI :
10.1109/ESTIMedia.2012.6507032
Filename :
6507032
Link To Document :
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