DocumentCode :
2039356
Title :
Behavioral Models of Input/Output Buffers Including Core Noise Coupling
Author :
Stievano, I.S. ; Siviero, C. ; Canavero, F.G. ; Maio, I.A.
Author_Institution :
Dipt. di Elettron., Politec. di Torino, Torino
fYear :
2008
fDate :
12-15 May 2008
Firstpage :
1
Lastpage :
4
Abstract :
This paper addresses the generation of enhanced models of the input/output buffers of digital integrated circuits. The proposed models overcome the current limitations of the state-of-the-art models and can be obtained from device port transient responses only. They can be effectively implemented as SPICE subcircuits in any commercial tool for signal integrity or core noise simulations.
Keywords :
SPICE; buffer circuits; digital integrated circuits; SPICE subcircuits; core noise coupling; core noise simulation; device port transient responses; digital integrated circuits; input/output buffers; signal integrity simulation; Circuit simulation; Current supplies; Digital integrated circuits; Electronic design automation and methodology; Equivalent circuits; Integrated circuit modeling; Integrated circuit noise; Logic devices; Manufacturing automation; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Propagation on Interconnects, 2008. SPI 2008. 12th IEEE Workshop on
Conference_Location :
Avignon
Print_ISBN :
978-1-4244-2317-0
Electronic_ISBN :
978-1-4244-2318-7
Type :
conf
DOI :
10.1109/SPI.2008.4558343
Filename :
4558343
Link To Document :
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