Title :
On the characterization of multi-point nets in electronic designs
Author :
Stroobandt, Dirk ; Kurdahi, Fadi J.
Author_Institution :
ELIS Dept., Ghent Univ., Belgium
Abstract :
Important layout properties of electronic designs include interconnection length values, clock speed, area requirements, and power dissipation. A reliable estimation of those properties is essential for improving placement and routing techniques for digital circuits. Previous work on estimating design properties failed to take multi-point nets into account. All nets were assumed to be 2-point nets (especially for estimating the number of nets). In this paper we aim at characterizing multi-point nets in electronic designs. We develop a model for the behaviour of multi-point nets during the partitioning process. The resulting distribution of nets over their net degree is validated through comparison with benchmark data
Keywords :
circuit layout CAD; digital integrated circuits; integrated circuit layout; multiport networks; network routing; area requirements; characterization; clock speed; digital circuits; electronic designs; interconnection length values; layout properties; multi-point nets; partitioning process; placement; power dissipation; routing; Chip scale packaging; Clocks; Design automation; Digital circuits; Frequency estimation; Integrated circuit interconnections; Libraries; Power dissipation; Production; Routing; Ultra large scale integration; Very large scale integration;
Conference_Titel :
VLSI, 1998. Proceedings of the 8th Great Lakes Symposium on
Conference_Location :
Lafayette, LA
Print_ISBN :
0-8186-8409-7
DOI :
10.1109/GLSV.1998.665303
