Design of high-speed parallel arithmetic algorithms and architectures

Author

Markova, Valentina

Author_Institution

Dept. of Supercomput. Software, Comput. Center, Novosibirsk, Russia

fYear

1997

fDate

9-10 Jan 1997

Firstpage

57

Lastpage

64

Abstract

Presents an algorithm for computing a sum of products, realizing a fundamental compound multiply-and-add operation of high-speed arithmetic. Two new cellular pipelined algorithms and architectures (2D and 3D) are proposed. The initial data and results are binary signed-digit integers. The multipliers are loaded digit-serially, while the multiplicands are loaded in a digit-parallel fashion and the results are produced in the same way. The design is performed in terms of cellular technology, based on an original model of distributed computation (the parallel substitution algorithm). The time- and structural complexity is obtained

Keywords

computational complexity; digital arithmetic; parallel algorithms; pipeline arithmetic; systolic arrays; binary signed-digit integers; cellular pipelined architectures; cellular technology; distributed computation model; high-speed arithmetic; high-speed parallel arithmetic algorithms; multiplicands; multipliers; multiply-and-add operation; parallel architectures; parallel substitution algorithm; structural complexity; sum of products; time complexity; Algorithm design and analysis; Arithmetic; Computational modeling; Computer architecture; Distributed computing; Hardware; Pipeline processing; Signal processing; Supercomputers; Topology;

fLanguage

English

Publisher

ieee

Conference_Titel

Distributed Interactive Simulation and Real Time Applications, 1997., First International Workshop on

Conference_Location

Eilat

Print_ISBN

0-8186-7773-2

Type

conf

DOI

10.1109/IDSRTA.1997.568658

Filename

568658