Compact and flexible linear-array-based implementations of a pipeline of multiprocessor modules (PMMLA) for high throughput applications

Author

Lee, Soo-Young ; Ghare, Gautam

Author_Institution

Dept. of Electr. Eng., Auburn Univ., AL, USA

fYear

1997

fDate

18-21 Dec 1997

Firstpage

296

Lastpage

301

Abstract

High throughput is required in many tasks, especially real-time applications. A logical structure of a parallel computing system for such applications is a pipeline of multiprocessor modules to be referred to as PMM. In this paper, a linear array based realization of PMM, referred to as PMMLA (PMM based on Linear Array) is proposed. The main design objective is to achieve uncompromised performance by a compact and flexible hardware structure. This paper describes the organization and operation of a PMMLA, analyzes its performance in detail, and compares it to other possible implementations theoretically and via emulation on nCUBE/2

Keywords

multiprocessing systems; multiprocessor interconnection networks; parallel architectures; parallel machines; performance evaluation; pipeline processing; real-time systems; reconfigurable architectures; design objective; emulation; hardware structure; high throughput applications; linear array; logical structure; multiprocessor module pipeline; nCUBE/2; parallel computing system; performance; real-time applications; reconfigurable architecture; Application software; Computational modeling; Computer graphics; Computer simulation; Hardware; Image processing; Multiprocessor interconnection networks; Parallel processing; Pipelines; Throughput;

fLanguage

English

Publisher

ieee

Conference_Titel

High-Performance Computing, 1997. Proceedings. Fourth International Conference on

Conference_Location

Bangalore

Print_ISBN

0-8186-8067-9

Type

conf

DOI

10.1109/HIPC.1997.634506

Filename

634506