Built-in Self-Repair in a 3D die stack using programmable logic

3D stacked integrated circuits hold great promise for increasing system performance, but difficulties in testing dies and assembling a 3D stack are leading to yield issues and slowing the large scale manufacture of these devices. We propose helping to mitigate these issues by repairing the stack with programmable logic in FPGAs that have already been included in the stack for other purposes. Specifically, we propose bypassing the defective portion of a die by replacing the defective functionality with functionality on the FPGA. In this paper, we focus on the replacement of selected defective functional units in an out-of-order microprocessor. Our simulation results show that not only can we salvage a device that would otherwise have to be discarded, but creating multiple copies of the defective partition in the FPGA can allow us to regain performance even when the latency of the units in the FPGA is longer than that of the original defective copy.