Extended abstract: A high-performance, low-overhead, power-analysis-resistant, single-rail logic style

Differential power analysis (DPA) has been shown to be an effective attack on cryptographic systems capable of revealing secret data by measuring power consumption. DPA-resistant circuits currently incur severe penalties in terms of performance, area, and power - as much as 4times in each. Additionally, most are dual-rail logic families, which can require careful attention to wire routing to ensure balanced output loads. We present three-phase single-rail precharge logic (TSPL), a single-rail dynamic logic family with high DPA resistance and significantly lower overheads in performance, area, and power than other DPA-resistant logic styles.